KEY FEATURES 
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Memory display/edit while executing in real-time
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Trace display during execution |
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Real-time transparent emulation up
to 52 MHz |
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Supports all versions of the Intel 80C186 and 80C188 families |
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3V and 5V target support |
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Transparent emulation — no resources taken away from the
x86 CPU |
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HLL debugging for Microsoft, Borland, and Intel C/C++ compilers
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32K frames (80 bits wide) of execution Trace Buffer, with time stamp |
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In-line symbolic assembler and disassembler |
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1 MByte of overlay memory |
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Real-time hardware breakpoints may be used with RAM or EPROM/ROM/Flash |
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Complex Events to trigger Breakpoints or Trace logic |
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Two 16-bit Pass Counters |
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8 level hardware break Sequencer |
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8 channel user logic state analyzer |
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External trigger input and outputs |
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Windows
Graphical User Interface |
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Serial and parallel (LPT) interface to PC host (no
plug-in cards) |
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Includes Chameleon Debugger for x86
(MS Windows based) |
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Fast code download
via LPT interface |
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Optional Coverage Analysis to show all code
locations executed, read and written |
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Made and supported in U.S.A. |
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CHAMELEON DEBUGGER
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The 186/86 Chameleon Debugger works on
Windows 95/98, NT, 2000 and XP computers, providing multiple windows for
Source, Registers, Memory, Stack, Variables, Locals, Commands, Coverage
Analysis and others. The source level debugger
window is capable of working with all major C and C++ compilers and links symbols
automatically to the Trace window. |
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Multi CPU support on the same
screen |
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Multiple
windows for source. memory, registers, etc. |
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User defined watch and SFR
windows |
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Fly-over
variable pop-ups in source window
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Drag and drop variables and
addresses |
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C, C++ and
ASM level debugging with trace synchronization |
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Macros for automatic testing
and verification |
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COMPLEX EVENTS
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Event is a set of conditions that control the operation of complex
program breakpoints and trace start/stop logic in real time. There are three
CPU Events
available, each consisting of the combination of the following:
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1 MB address breakpoints or ranges |
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16-bit data pattern
with less than, greater than,
equal, not equal, and don't care combinations |
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Memory R/W, I/O R/W, Interrupt, and instruction read as cycle qualifiers |
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External input with
programmable trigger polarity |
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In addition, Events can be counted or delayed by the use of two 16-bit Pass Counters. An
eight level hardware sequencer of the emulator is available to sequentially trigger
from/to any Event or Pass Counter.
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BREAKPOINTS
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Breakpoints are used to stop the execution of the
186/86 application
program preserving the current program status. They can be triggered from a combination
of:
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Address or Range of Addresses |
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Complex
Events |
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External Input |
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Pass Counters
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Sequencer |
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Trace Buffer Full
Condition |
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TRACE BUFFER
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Trace buffer is a high speed RAM used to
capture in real-time all activity on the x86 microprocessor internal bus and pins. A
dedicated start/stop logic allows for filtering unwanted information from the trace
buffer. Buffer will remember the selected 32K samples (frames) comprised of the following: |
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Address Bus |
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Data Bus |
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Control Signals |
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I/O Pins |
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Real Time Clock Stamp |
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User Logic Inputs
(8 bits) |
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The 80186/86
trace can be started/stopped by the combination of:
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GO Command |
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Complex Events |
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Pass Counters
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Sequencer |
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Trace Full
Condition |
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Additionally,
the emulator's trace buffer of is equipped with a special internal counter to
allow tracing to stop after a specified number of frames. This feature allows Trace to
catch as much as 32K of small fragments (snapshots) of executed program at full running
speed. The trace contents can be examined during program execution without slowing down
the microcontroller.
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SPECIFICATIONS
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Supported Microcontrollers |
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POD186EA:
POD186EB:
POD186EC:
POD186XL:
POD186: |
80C186EA, 80C188EA
80C186EB, 80C188EB
80C186EC, 80C188EC
80C186XL, 80C188XL, 80L186XL, 80L188XL
80C186, 80C188 |
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Maximum emulation speed |
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Up to 52 MHz |
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Size |
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260 mm wide, 260 mm deep, 64 mm high |
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Emulation Program Memory |
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1 MByte |
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Number of Hardware Breakpoints |
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Unlimited |
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Program Memory Mapping |
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256 byte boundary |
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Write Protect Mapping |
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256 byte boundary |
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Pass Counters |
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two, 16-bit each |
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Trace buffer |
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32K frames × 80 bits with pre- and post-filtering |
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Real Time Stamp |
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32-bits, 100 ns resoultion |
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Sequencer |
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8 level hardware |
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User probe |
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8 channel logic input
1 trigger input with gate
6 trigger outputs (Events, Pass Counters, Sequencer) |
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Host interface |
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Asynchronous RS-232C, 9600-115KBaud, XON/XOFF support
and Printer Port (LPT1, LPT2) |
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Language support |
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C and C++ from Microsoft, Borland, Intel,
Paradigm and others |
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